1/9 january 2002 n high speed: t pd = 0.4 ns (typ.) at v cc = 3.3 v t pd = 0.1 ns (typ.) at v cc = 5 v n low power dissipation: i cc = 2 m a (max.) at t a =25c n low "on " low resistance r on = 14 w at v cc = 3.3v , i i/o < 1 ma r on = 12 w at v cc = 5.0v , i i/o < 1 ma n sine wave distortion : 0.04% at v cc = 3.3v , f = 1khz n operating voltage range: v cc(opr) = 2v to 5.5v n pin and function compatible with 74 series 4066 n improved latch-up immunity description the 74lvq4066 is a low voltage cmos quad bilateral switch fabricated with sub-micron silicon gate and double-layer metal wiring c 2 mos technology. it is ideal for low power and low noise 3.3v applications and each switch is designed to handle both analog and digital signals. the switches permit signals with amplitudes up to vcc (peak) to be transmitted in either direction without relevant propagation delay and without generating additional ground bounce noise. it has an on-resistance which is greatly reduced in comparison with 74hc4066. it is provided of four individual enable inputs to control the switches; the switch is on when the c input is held high and off (high impedance) when c is held low. all inputs and outputs are equipped with protection circuits against static discharge, giving them esd immunity and transient excess voltage. 74lvq4066 quad bilateral switch pin connection and iec logic symbols order codes package tube t & r sop 74LVQ4066M 74LVQ4066Mtr tssop 74lvq4066ttr tssop sop
74lvq4066 2/9 logic diagram pin description truth table (*) high impedance absolute maximum ratings absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditi ons is not implied recommended operating conditions 1) truth table guaranteed: 1.2v to 5.5v 2) v in from 30% to 70%v cc pin no symbol name and function 1, 4, 8, 11 1 to 4 i/o independent input/output 2, 3, 9, 10 1 to 4 o/i independent output/input 13, 5, 6, 12 1c to 4c enable input (active high) 7 gnd ground (0v) 14 v cc positive supply voltage ab hon l off* symbol parameter value unit v cc supply voltage -0.5 to +7 v v i dc input voltage -0.5 to v cc + 0.5 v v o dc output voltage -0.5 to v cc + 0.5 v i ik dc input diode current 20 ma i ok dc output diode current 20 ma i o dc output current 50 ma i cc or i gnd dc v cc or ground current 200 ma t stg storage temperature -65 to +150 c t l lead temperature (10 sec) 300 c symbol parameter value unit v cc supply voltage (note 1) 2 to 5.5 v v i input voltage 0 to v cc v v o output voltage 0 to v cc v t op operating temperature -55 to 125 c dt/dv input rise and fall time on control pin v cc = 3.0v (note 2) 0 to 10 ns/v
74lvq4066 3/9 dc specifications (*)voltage range is 5v 0.5v (**)voltage range is 3.3v 0.3v symbol parameter test condition value unit v cc (v) t a = 25c -40 to 85c -55 to 125c min. typ. max. min. max. min. max. v ih high level input voltage 2.7 to 5.5 0.7 v cc 0.7 v cc 0.7 v cc v v il low level input voltage 0.3 v cc 0.3 v cc 0.3 v cc v r on on resistance 3.3 (**) v i = v ih v i/o =v cc t o g n d i i/o < 1ma 14 20 28 36 w 5.0(*) 12 17 22 26 3.3 (**) v i = v ih v i/o =v cc o r g n d i i/o < 1ma 10.5 14 20 26 5.0(*) 9.5 13 17 20 r on difference of on resistance between switches 3.0 to 5.5 v i = v ih v i/o =v cc t o g n d i i/o < 1ma 2 w i off input/output leakage current (switch off) 5.5 v os = v cc to gnd v is = v cc to gnd v i = v il 0.1 1.0 1.0 m a i iz switch input leakage current (switch on , output off) 5.5 v os = v cc to gnd v i = v ih 0.1 1.0 1.0 m a i in control input leakage current 5.5 v i = v cc or gnd 0.1 1.0 1.0 m a i cc quiescent supply current 5.5 v i = v cc or gnd 22020 m a
74lvq4066 4/9 ac electrical characteristics (c l = 50 pf, input t r = t f = 3ns) 1) c pd is defined as the value of the ics internal equivalent capacitance which is calculated from the operating current consumption without load. (refer to test circuit). average operating current can be obtained by the following equation. i cc (opr) = c pd xv cc xf in +i cc /4 (switch). (*) voltage range is 3.3v 0.3v (*) voltage range is 5v 0.5v analog switch characteristics (gnd = 0 v , ta = 25c) (*) voltage range is 5v 0.5v symbol parameter test condition value unit v cc (v) t a = 25c -40 to 85c -55 to 125c min. typ. max. min. max. min. max. t pd delay time 3.3(*) 0.4 0.8 1.2 2.0 ns 5.0 (**) 0.1 0.2 1.0 1.8 t pzl t pzh output enable time 3.3(*) r l = 1 k w 2.5 4.0 5.0 7.0 ns 5.0 (**) 2.0 4.0 5.0 7.0 t plz t phz output disable time 3.3(*) r l = 1 k w 5.0 7.5 9.0 11.0 ns 5.0 (**) 5.0 7.5 9.0 11.0 c in input capacitance 5 pf c i/o switch terminal capacitance 10 pf c pd power dissipation capacitance (note 1) 3.3 2.5 pf 5.0 3 symbol parameter test condition value unit v cc (v) v in (v p-p ) sine wave distortion (thd) 3.3 2.75 f in = 1 khz r l = 10k w c l = 50 pf 0.04 % 5.0(*) 4 0.04 f max frequency response (switch on) 3.3 adjust f in voltage to obtain 0dbm at v os . increase f in frequency until db meter reads -3db rl = 50 w , c l = 10pf 150 mhz 5.0(*) 180 feed through attenuation (switch off) 3.3 v in is centered at v cc /2. adjust input for 0dbm r l = 600 w , c l = 50pf, f in = 1 mhz sine wave -60 db 5.0(*) -60 crosstalk (control input to signal output) 3.3 r l = 600 w, c l = 50pf, f in = 1mhz square wave 60 mv 5.0(*) 60 crosstalk (between any switches) 3.3 r l = 600 w, c l = 50pf, f in = 1mhz sine wave -60 db 5.0(*) -60
74lvq4066 5/9 switching caracteristics test circuit crosstalk (control to output) bandwidth and feedthrough attenuation maximum control frequency
74lvq4066 6/9 channel resistance (r on) i cc (opr.)
74lvq4066 7/9 dim. mm. inch min. typ max. min. typ. max. a 1.75 0.068 a1 0.1 0.2 0.003 0.007 a2 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 c 0.5 0.019 c1 45 (typ.) d 8.55 8.75 0.336 0.344 e 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 7.62 0.300 f 3.8 4.0 0.149 0.157 g 4.6 5.3 0.181 0.208 l 0.5 1.27 0.019 0.050 m 0.68 0.026 s8 (max.) so-14 mechanical data po13g
74lvq4066 8/9 dim. mm. inch min. typ max. min. typ. max. a 1.2 0.047 a1 0.05 0.15 0.002 0.004 0.006 a2 0.8 1 1.05 0.031 0.039 0.041 b 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 d 4.9 5 5.1 0.193 0.197 0.201 e 6.2 6.4 6.6 0.244 0.252 0.260 e1 4.3 4.4 4.48 0.169 0.173 0.176 e 0.65 bsc 0.0256 bsc k0 80 8 l 0.45 0.60 0.75 0.018 0.024 0.030 tssop14 mechanical data c e b a2 a e1 d 1 pin 1 identification a1 l k e 0080337d
74lvq4066 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. ? the st logo is a registered trademark of stmicroelectronics ? 2002 stmicroelectronics - printed in italy - all rights reserved stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malaysia - malta - morocco singapore - spain - sweden - switzerland - united kingdom ? http://www.st.com 9/9
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